The DBMD7 family offers a complete, voice processor solution for Always-On applications in mobile devices and the world of Internet of Things (IoT) that require ultra-high processing power. DBMD7 implements a triple core DSP, designed to process the most sophisticated audio algorithms in the market. Target applications for DBMD7 include:▪ Voice command processor for intelligent personal assistants▪ Voice processor for Dolby surround and DTS▪ Voice recognition for SmartTVs▪ Intelligent sound bars.
大大通参考设计方案 基於DSPG+Qualcomm 8MIC 強力回聲消除聲源定位會議音響方案
DBMD7 includes three CEVA-X2 DSP processors.
Secure boot support for code security protection, authentication and rollback protection provides the following services: AES 128 code decryption
DBMD7 supports an external host interface for boot and control with the following speeds:
SPI: up to 25 Mbps
I2C: up to 3 Mbps
UART: up to 6 Mbps
General-Purpose I/O (GPIO):
Up to 56 MUXed GPIOs, 8 of which can be configured as external interrupts
There are 8x32-bit timers , one of which that can be a Watchdog Timer (WDT).
Time Domain Multiplexer (TDM):
There are eight TDMs, each of which transfers data between the on-chip DSP and external AP or Codec via a serial interface using a full-duplex, four-wire link. The TDM is programmable and supports direct interface with I2S, TDM framers.
Digital Microphone (DM) Interface:
The DM interface enables direct connection to a digital acoustic microphone.
Support for sampling rates of: 8, 16, 22.05, 32, 44.1, 48,96 KHz
Configurable sample sizes: 16-bit or 24-bit
System Control Unit (SCU):
The SCU offers an advanced clocking scheme with automatic clock gating control. Advanced low-power Standby and Deep Shutdown modes are supported. Flexible clock management is available for multiple clock domains.
Real Time Clock (RTC)
32-bit RTC counter with programmable Alarm interrupt
32.768 KHz micro-power crystal oscillator can be used as an input for the main clock by means of strap settings.
Quad SPI Controller (QSPIC)
The QSPIC allows flexible and fast interconnection between a CPU and serial Flash memory using the QSPI, which controls the Flash memory and executes the appropriate data operations.